arch/arm/boot/dts/samsung/exynos4x12.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos4x12.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/exynos4x12.dtsi
Extension
.dtsi
Size
16981 bytes
Lines
663
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's Exynos4412 SoC device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Samsung's Exynos4x12 SoC series device nodes are listed in this file.
 * Particular SoCs from Exynos4x12 series can include this file and provide
 * values for SoCs specific bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4x12 SoCs. As device tree coverage for Exynos4x12 increases, additional
 * nodes can be added to this file.
 */

#include "exynos4.dtsi"

#include "exynos4-cpu-thermal.dtsi"

/ {
	aliases {
		pinctrl0 = &pinctrl_0;
		pinctrl1 = &pinctrl_1;
		pinctrl2 = &pinctrl_2;
		pinctrl3 = &pinctrl_3;
		fimc-lite0 = &fimc_lite_0;
		fimc-lite1 = &fimc_lite_1;
	};

	bus_acp: bus-acp {
		compatible = "samsung,exynos-bus";
		clocks = <&clock CLK_DIV_ACP>;
		clock-names = "bus";
		operating-points-v2 = <&bus_acp_opp_table>;
		status = "disabled";

		bus_acp_opp_table: opp-table {
			compatible = "operating-points-v2";

			opp-100000000 {
				opp-hz = /bits/ 64 <100000000>;
			};
			opp-134000000 {
				opp-hz = /bits/ 64 <134000000>;
			};
			opp-160000000 {
				opp-hz = /bits/ 64 <160000000>;
			};
			opp-267000000 {
				opp-hz = /bits/ 64 <267000000>;
			};
		};
	};

	bus_c2c: bus-c2c {
		compatible = "samsung,exynos-bus";
		clocks = <&clock CLK_DIV_C2C>;
		clock-names = "bus";
		operating-points-v2 = <&bus_dmc_opp_table>;
		status = "disabled";
	};

	bus_dmc: bus-dmc {
		compatible = "samsung,exynos-bus";
		clocks = <&clock CLK_DIV_DMC>;
		clock-names = "bus";
		operating-points-v2 = <&bus_dmc_opp_table>;
		samsung,data-clock-ratio = <4>;
		#interconnect-cells = <0>;

Annotation

Implementation Notes