arch/arm/boot/dts/samsung/exynos5260.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos5260.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/exynos5260.dtsi
Extension
.dtsi
Size
15044 bytes
Lines
555
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung Exynos5260 SoC device tree source
 *
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 */

#include <dt-bindings/clock/exynos5260-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "samsung,exynos5260", "samsung,exynos5";
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		i2c0 = &hsi2c_0;
		i2c1 = &hsi2c_1;
		i2c2 = &hsi2c_2;
		i2c3 = &hsi2c_3;
		pinctrl0 = &pinctrl_0;
		pinctrl1 = &pinctrl_1;
		pinctrl2 = &pinctrl_2;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu2>;
				};
				core1 {
					cpu = <&cpu3>;
				};
				core2 {
					cpu = <&cpu4>;
				};
				core3 {
					cpu = <&cpu5>;
				};
			};
		};

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x0>;
			cci-control-port = <&cci_control1>;
		};

		cpu1: cpu@1 {

Annotation

Implementation Notes