arch/arm/boot/dts/samsung/exynos5422-odroid-core.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos5422-odroid-core.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/samsung/exynos5422-odroid-core.dtsi- Extension
.dtsi- Size
- 21209 bytes
- Lines
- 1073
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/samsung,s2mps11.hdt-bindings/interrupt-controller/irq.hdt-bindings/gpio/gpio.hexynos5800.dtsiexynos5422-cpus.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
*
* Copyright (c) 2017 Marek Szyprowski
* Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*/
#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "exynos5800.dtsi"
#include "exynos5422-cpus.dtsi"
/ {
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x7ea00000>;
};
aliases {
mmc2 = &mmc_2;
};
chosen {
stdout-path = "serial2:115200n8";
};
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
fixed-rate-clocks {
oscclk {
compatible = "samsung,exynos5420-oscclk";
clock-frequency = <24000000>;
};
};
bus_wcore_opp_table: opp-table-2 {
compatible = "operating-points-v2";
/* derived from 532MHz MPLL */
opp00 {
opp-hz = /bits/ 64 <88700000>;
opp-microvolt = <925000 925000 1400000>;
};
opp01 {
opp-hz = /bits/ 64 <133000000>;
opp-microvolt = <950000 950000 1400000>;
};
opp02 {
opp-hz = /bits/ 64 <177400000>;
opp-microvolt = <950000 950000 1400000>;
};
opp03 {
opp-hz = /bits/ 64 <266000000>;
opp-microvolt = <950000 950000 1400000>;
};
opp04 {
opp-hz = /bits/ 64 <532000000>;
opp-microvolt = <1000000 1000000 1400000>;
};
};
bus_noc_opp_table: opp-table-3 {
compatible = "operating-points-v2";
Annotation
- Immediate include surface: `dt-bindings/clock/samsung,s2mps11.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/gpio/gpio.h`, `exynos5800.dtsi`, `exynos5422-cpus.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.