arch/arm/boot/dts/samsung/exynos5422-odroidhc1.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos5422-odroidhc1.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/samsung/exynos5422-odroidhc1.dts- Extension
.dts- Size
- 5547 bytes
- Lines
- 267
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/leds/common.hexynos5422-odroid-core.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Hardkernel Odroid HC1 board device tree source
*
* Copyright (c) 2017 Marek Szyprowski
* Copyright (c) 2017 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "exynos5422-odroid-core.dtsi"
/ {
model = "Hardkernel Odroid HC1";
compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
"samsung,exynos5";
led-controller {
compatible = "pwm-leds";
led-1 {
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_BLUE>;
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
max-brightness = <255>;
linux,default-trigger = "heartbeat";
};
};
thermal-zones {
cpu0_thermal: cpu0-thermal {
thermal-sensors = <&tmu_cpu0>;
trips {
cpu0_alert0: cpu-alert-0 {
temperature = <70000>; /* millicelsius */
hysteresis = <10000>; /* millicelsius */
type = "active";
};
cpu0_alert1: cpu-alert-1 {
temperature = <85000>; /* millicelsius */
hysteresis = <10000>; /* millicelsius */
type = "active";
};
cpu0_crit0: cpu-crit-0 {
temperature = <120000>; /* millicelsius */
hysteresis = <0>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
/*
* When reaching cpu0_alert0, reduce CPU
* by 2 steps. On Exynos5422/5800 that would
* be: 1600 MHz and 1100 MHz.
*/
map0 {
trip = <&cpu0_alert0>;
cooling-device = <&cpu0 0 2>,
<&cpu1 0 2>,
<&cpu2 0 2>,
<&cpu3 0 2>,
<&cpu4 0 2>,
<&cpu5 0 2>,
<&cpu6 0 2>,
<&cpu7 0 2>;
};
/*
Annotation
- Immediate include surface: `dt-bindings/leds/common.h`, `exynos5422-odroid-core.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.