arch/arm/boot/dts/samsung/exynos5422-odroidxu3-audio.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos5422-odroidxu3-audio.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/exynos5422-odroidxu3-audio.dtsi
Extension
.dtsi
Size
1830 bytes
Lines
83
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Hardkernel Odroid XU3 audio subsystem device tree source
 *
 * Copyright (c) 2015 Krzysztof Kozlowski
 * Copyright (c) 2014 Collabora Ltd.
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 */

#include <dt-bindings/sound/samsung-i2s.h>

/ {
	sound: sound {
		compatible = "samsung,odroid-xu3-audio";
		model = "Odroid-XU3";

		samsung,audio-widgets =
			"Headphone", "Headphone Jack",
			"Speakers", "Speakers";
		audio-routing = "Headphone Jack", "HPL",
				"Headphone Jack", "HPR",
				"Headphone Jack", "MICBIAS",
				"IN12", "Headphone Jack",
				"Speakers", "SPKL",
				"Speakers", "SPKR",
				"I2S Playback", "Mixer DAI TX",
				"HiFi Playback", "Mixer DAI TX",
				"Mixer DAI RX", "HiFi Capture";

		cpu {
			sound-dai = <&i2s0 0>, <&i2s0 1>;
		};
		codec {
			sound-dai = <&hdmi>, <&max98090>;
		};
	};
};

&hsi2c_5 {
	status = "okay";
	max98090: audio-codec@10 {
		compatible = "maxim,max98090";
		reg = <0x10>;
		interrupt-parent = <&gpx3>;
		interrupts = <2 IRQ_TYPE_NONE>;
		clocks = <&i2s0 CLK_I2S_CDCLK>;
		clock-names = "mclk";
		#sound-dai-cells = <0>;
	};
};

&i2s0 {
	status = "okay";
	assigned-clocks = <&clock CLK_MOUT_EPLL>,
			<&clock CLK_MOUT_MAU_EPLL>,
			<&clock CLK_MOUT_USER_MAU_EPLL>,
			<&clock_audss EXYNOS_MOUT_AUDSS>,
			<&clock_audss EXYNOS_MOUT_I2S>,
			<&i2s0 CLK_I2S_RCLK_SRC>,
			<&clock_audss EXYNOS_DOUT_SRP>,
			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
			<&clock_audss EXYNOS_DOUT_I2S>;

	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
			<&clock CLK_MOUT_EPLL>,
			<&clock CLK_MOUT_MAU_EPLL>,
			<&clock CLK_MAU_EPLL>,
			<&clock_audss EXYNOS_MOUT_AUDSS>,
			<&clock_audss EXYNOS_SCLK_I2S>;

Annotation

Implementation Notes