arch/arm/boot/dts/samsung/exynos5422-samsung-k3g.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos5422-samsung-k3g.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/samsung/exynos5422-samsung-k3g.dts- Extension
.dts- Size
- 13851 bytes
- Lines
- 680
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/samsung,s2mps11.hdt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/irq.hexynos5800.dtsiexynos5422-cpus.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung Galaxy S5 (SM-G900H) device-tree source
*
* Copyright (c) 2023 Markuss Broks
*/
/dts-v1/;
#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "exynos5800.dtsi"
#include "exynos5422-cpus.dtsi"
/ {
model = "Samsung Galaxy S5 (SM-G900H)";
compatible = "samsung,k3g", "samsung,exynos5800", \
"samsung,exynos5";
chassis-type = "handset";
aliases {
mmc0 = &mmc_0;
};
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x80000000>; /* 2 GiB */
};
fixed-rate-clocks {
oscclk {
compatible = "samsung,exynos5420-oscclk";
clock-frequency = <24000000>;
};
};
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
tsp_vdd: regulator-tsp-vdd-en {
compatible = "regulator-fixed";
regulator-name = "tsp_vdd_en";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpy3 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&cpu0 {
cpu-supply = <&buck2_reg>;
};
&cpu4 {
cpu-supply = <&buck6_reg>;
};
&gpu {
status = "okay";
mali-supply = <&buck4_reg>;
};
&hsi2c_7 {
status = "okay";
pmic@66 {
compatible = "samsung,s2mps11-pmic";
Annotation
- Immediate include surface: `dt-bindings/clock/samsung,s2mps11.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/irq.h`, `exynos5800.dtsi`, `exynos5422-cpus.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.