arch/arm/boot/dts/samsung/s3c64xx-pinctrl.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/s3c64xx-pinctrl.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/s3c64xx-pinctrl.dtsi
Extension
.dtsi
Size
17173 bytes
Lines
683
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's S3C64xx SoC series common device tree source
 * - pin control-related definitions
 *
 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
 *
 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
 * listed as device tree nodes in this file.
 */

#include "s3c64xx-pinctrl.h"

&pinctrl0 {
	/*
	 * Pin banks
	 */

	gpa: gpa-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpb: gpb-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpc: gpc-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpd: gpd-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpe: gpe-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
	};

	gpf: gpf-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gpg: gpg-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	gph: gph-gpio-bank {
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;

Annotation

Implementation Notes