arch/arm/boot/dts/st/spear1310.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/spear1310.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/spear1310.dtsi- Extension
.dtsi- Size
- 7353 bytes
- Lines
- 308
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* DTS file for all SPEAr1310 SoCs
*
* Copyright 2012 Viresh Kumar <vireshk@kernel.org>
*/
/include/ "spear13xx.dtsi"
/ {
compatible = "st,spear1310";
ahb {
spics: spics@e0700000 {
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x3b0>;
st-spics,sw-enable-bit = <12>;
st-spics,cs-value-bit = <11>;
st-spics,cs-enable-mask = <3>;
st-spics,cs-enable-shift = <8>;
gpio-controller;
#gpio-cells = <2>;
};
miphy0: miphy@eb800000 {
compatible = "st,spear1310-miphy";
reg = <0xeb800000 0x4000>;
misc = <&misc>;
phy-id = <0>;
#phy-cells = <1>;
status = "disabled";
};
miphy1: miphy@eb804000 {
compatible = "st,spear1310-miphy";
reg = <0xeb804000 0x4000>;
misc = <&misc>;
phy-id = <1>;
#phy-cells = <1>;
status = "disabled";
};
miphy2: miphy@eb808000 {
compatible = "st,spear1310-miphy";
reg = <0xeb808000 0x4000>;
misc = <&misc>;
phy-id = <2>;
#phy-cells = <1>;
status = "disabled";
};
ahci0: ahci@b1000000 {
compatible = "snps,spear-ahci";
reg = <0xb1000000 0x10000>;
interrupts = <0 68 0x4>;
phys = <&miphy0 0>;
phy-names = "sata-phy";
status = "disabled";
};
ahci1: ahci@b1800000 {
compatible = "snps,spear-ahci";
reg = <0xb1800000 0x10000>;
interrupts = <0 69 0x4>;
phys = <&miphy1 0>;
phy-names = "sata-phy";
status = "disabled";
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.