arch/arm/boot/dts/st/spear13xx.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/spear13xx.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/st/spear13xx.dtsi
Extension
.dtsi
Size
7313 bytes
Lines
339
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * DTS file for all SPEAr13xx SoCs
 *
 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
 */

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0>;
			next-level-cache = <&L2>;
		};

		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <1>;
			next-level-cache = <&L2>;
		};
	};

	gic: interrupt-controller@ec801000 {
		compatible = "arm,cortex-a9-gic";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = < 0xec801000 0x1000 >,
		      < 0xec800100 0x0100 >;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0 6 0x04>,
			     <0 7 0x04>;
	};

	L2: cache-controller {
		    compatible = "arm,pl310-cache";
		    reg = <0xed000000 0x1000>;
		    cache-unified;
		    cache-level = <2>;
	};

	memory {
		name = "memory";
		device_type = "memory";
		reg = <0 0x40000000>;
	};

	chosen {
		bootargs = "console=ttyAMA0,115200";
	};

	cpufreq {
		compatible = "st,cpufreq-spear";
		cpufreq_tbl = < 166000
				200000
				250000
				300000
				400000
				500000

Annotation

Implementation Notes