arch/arm/boot/dts/st/spear320-evb.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/spear320-evb.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/spear320-evb.dts- Extension
.dts- Size
- 3284 bytes
- Lines
- 202
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* DTS file for SPEAr320 Evaluation Baord
*
* Copyright 2012 Viresh Kumar <vireshk@kernel.org>
*/
/dts-v1/;
/include/ "spear320.dtsi"
/ {
model = "ST SPEAr320 Evaluation Board";
compatible = "st,spear320-evb", "st,spear320";
#address-cells = <1>;
#size-cells = <1>;
memory {
reg = <0 0x40000000>;
};
ahb {
pinmux@b3000000 {
st,pinmux-mode = <4>;
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
i2c0 {
st,pins = "i2c0_grp";
st,function = "i2c0";
};
mii0 {
st,pins = "mii0_grp";
st,function = "mii0";
};
ssp0 {
st,pins = "ssp0_grp";
st,function = "ssp0";
};
uart0 {
st,pins = "uart0_grp";
st,function = "uart0";
};
sdhci {
st,pins = "sdhci_cd_51_grp";
st,function = "sdhci";
};
i2s {
st,pins = "i2s_grp";
st,function = "i2s";
};
uart1 {
st,pins = "uart1_grp";
st,function = "uart1";
};
uart2 {
st,pins = "uart2_grp";
st,function = "uart2";
};
can0 {
st,pins = "can0_grp";
st,function = "can0";
};
can1 {
st,pins = "can1_grp";
st,function = "can1";
};
mii2 {
st,pins = "mii2_grp";
st,function = "mii2";
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.