arch/arm/boot/dts/st/ste-ab8500.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/ste-ab8500.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/ste-ab8500.dtsi- Extension
.dtsi- Size
- 10135 bytes
- Lines
- 393
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/ste-ab8500.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 Linaro Ltd
*/
#include <dt-bindings/clock/ste-ab8500.h>
/ {
/* Essential housekeeping hardware monitors */
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&gpadc 0x02>, /* Battery temperature */
<&gpadc 0x03>, /* Main charger voltage */
<&gpadc 0x08>, /* Main battery voltage */
<&gpadc 0x09>, /* VBUS */
<&gpadc 0x0a>, /* Main charger current */
<&gpadc 0x0b>, /* USB charger current */
<&gpadc 0x0c>, /* Backup battery voltage */
<&gpadc 0x0d>, /* Die temperature */
<&gpadc 0x12>; /* Crystal temperature */
};
soc {
prcmu@80157000 {
ab8500 {
compatible = "stericsson,ab8500";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
ab8500_clock: clock-controller {
compatible = "stericsson,ab8500-clk";
#clock-cells = <1>;
};
ab8500_gpio: gpio {
compatible = "stericsson,ab8500-gpio";
gpio-controller;
#gpio-cells = <2>;
};
rtc {
compatible = "stericsson,ab8500-rtc";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
<18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM";
};
gpadc: adc {
compatible = "stericsson,ab8500-gpadc";
interrupts = <32 IRQ_TYPE_LEVEL_HIGH>,
<39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
/* GPADC channels */
bat_ctrl: channel@1 {
reg = <0x01>;
};
btemp_ball: channel@2 {
reg = <0x02>;
};
main_charger_v: channel@3 {
reg = <0x03>;
Annotation
- Immediate include surface: `dt-bindings/clock/ste-ab8500.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.