arch/arm/boot/dts/st/ste-href-family-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/ste-href-family-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/ste-href-family-pinctrl.dtsi- Extension
.dtsi- Size
- 4992 bytes
- Lines
- 213
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
ste-dbx5x0-pinctrl.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Linaro Ltd.
*/
#include "ste-dbx5x0-pinctrl.dtsi"
/ {
soc {
pinctrl {
/* Settings for all SPI default and sleep states */
spi2 {
spi2_default_mode: spi_default {
default_mux {
function = "spi2";
groups = "spi2_oc1_2";
};
default_cfg1 {
pins = "GPIO216_AG12"; /* FRM */
ste,config = <&gpio_out_hi>;
};
default_cfg2 {
pins = "GPIO218_AH11"; /* RXD */
ste,config = <&in_pd>;
};
default_cfg3 {
pins =
"GPIO215_AH13", /* TXD */
"GPIO217_AH12"; /* CLK */
ste,config = <&out_lo>;
};
};
spi2_idle_mode: spi_idle {
/*
* The idle mode is basically sleep mode sans wakeups. Also
* note that we have muxes the pins off the function here
* as we do not state any muxing.
*/
idle_cfg1 {
pins = "GPIO218_AH11"; /* RXD */
ste,config = <&slpm_in_pdis>;
};
idle_cfg2 {
pins = "GPIO215_AH13"; /* TXD */
ste,config = <&slpm_out_lo_pdis>;
};
idle_cfg3 {
pins = "GPIO217_AH12"; /* CLK */
ste,config = <&slpm_pdis>;
};
};
spi2_sleep_mode: spi_sleep {
sleep_cfg1 {
pins =
"GPIO216_AG12", /* FRM */
"GPIO218_AH11"; /* RXD */
ste,config = <&slpm_in_wkup_pdis>;
};
sleep_cfg2 {
pins = "GPIO215_AH13"; /* TXD */
ste,config = <&slpm_out_lo_wkup_pdis>;
};
sleep_cfg3 {
pins = "GPIO217_AH12"; /* CLK */
ste,config = <&slpm_wkup_pdis>;
};
};
};
Annotation
- Immediate include surface: `ste-dbx5x0-pinctrl.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.