arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts- Extension
.dts- Size
- 1259 bytes
- Lines
- 57
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
ste-db8500.dtsiste-href-ab8500.dtsiste-hrefv60plus.dtsiste-href-tvk1281618-r2.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 ST-Ericsson AB
*
* Device Tree for the HREF version 60 or later with the TVK1281618 R2 UIB
*/
/dts-v1/;
#include "ste-db8500.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-hrefv60plus.dtsi"
#include "ste-href-tvk1281618-r2.dtsi"
/ {
model = "ST-Ericsson HREF (v60+) and TVK1281618 R2 UIB";
compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
/* ST6G3244ME level translator for 1.8/2.9 V */
vmmci: regulator-gpio {
compatible = "regulator-gpio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-name = "mmci-reg";
regulator-type = "voltage";
startup-delay-us = <100>;
states = <1800000 0x1
2900000 0x0>;
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&vmmci_default_mode>;
};
};
&pinctrl {
vmmci {
vmmci_default_mode: vmmc_default {
/* VMMCI level-shifter enable */
default_hrefv60_cfg2 {
pins = "GPIO169_D22";
ste,config = <&gpio_out_hi>;
};
/* VMMCI level-shifter voltage select */
default_hrefv60_cfg3 {
pins = "GPIO5_AG6";
ste,config = <&gpio_out_hi>;
};
};
};
};
Annotation
- Immediate include surface: `ste-db8500.dtsi`, `ste-href-ab8500.dtsi`, `ste-hrefv60plus.dtsi`, `ste-href-tvk1281618-r2.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.