arch/arm/boot/dts/st/stih407-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stih407-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stih407-pinctrl.dtsi- Extension
.dtsi- Size
- 31469 bytes
- Lines
- 1263
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
st-pincfg.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2014 STMicroelectronics Limited.
* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*/
#include "st-pincfg.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
aliases {
/* 0-5: PIO_SBC */
gpio0 = &pio0;
gpio1 = &pio1;
gpio2 = &pio2;
gpio3 = &pio3;
gpio4 = &pio4;
gpio5 = &pio5;
/* 10-19: PIO_FRONT0 */
gpio6 = &pio10;
gpio7 = &pio11;
gpio8 = &pio12;
gpio9 = &pio13;
gpio10 = &pio14;
gpio11 = &pio15;
gpio12 = &pio16;
gpio13 = &pio17;
gpio14 = &pio18;
gpio15 = &pio19;
/* 20: PIO_FRONT1 */
gpio16 = &pio20;
/* 30-35: PIO_REAR */
gpio17 = &pio30;
gpio18 = &pio31;
gpio19 = &pio32;
gpio20 = &pio33;
gpio21 = &pio34;
gpio22 = &pio35;
/* 40-42: PIO_FLASH */
gpio23 = &pio40;
gpio24 = &pio41;
gpio25 = &pio42;
};
soc {
pin-controller-sbc@961f080 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,stih407-sbc-pinctrl";
st,syscfg = <&syscfg_sbc>;
reg = <0x0961f080 0x4>;
reg-names = "irqmux";
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irqmux";
ranges = <0 0x09610000 0x6000>;
pio0: gpio@9610000 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0x100>;
st,bank-name = "PIO0";
};
pio1: gpio@9611000 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x1000 0x100>;
st,bank-name = "PIO1";
Annotation
- Immediate include surface: `st-pincfg.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.