arch/arm/boot/dts/st/stih418-b2264.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stih418-b2264.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stih418-b2264.dts- Extension
.dts- Size
- 2631 bytes
- Lines
- 152
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
stih418.dtsidt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2021 STMicroelectronics
* Author: Alain Volmat <avolmat@me.com>
*/
/dts-v1/;
#include "stih418.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "STiH418 B2264";
compatible = "st,stih418-b2264", "st,stih418";
chosen {
stdout-path = &sbc_serial0;
};
memory@40000000 {
device_type = "memory";
reg = <0x40000000 0xc0000000>;
};
cpus {
cpu@0 {
operating-points-v2 = <&cpu_opp_table>;
/* u-boot puts hpen in SBC dmem at 0xb8 offset */
cpu-release-addr = <0x94100b8>;
};
cpu@1 {
operating-points-v2 = <&cpu_opp_table>;
/* u-boot puts hpen in SBC dmem at 0xb8 offset */
cpu-release-addr = <0x94100b8>;
};
cpu@2 {
operating-points-v2 = <&cpu_opp_table>;
/* u-boot puts hpen in SBC dmem at 0xb8 offset */
cpu-release-addr = <0x94100b8>;
};
cpu@3 {
operating-points-v2 = <&cpu_opp_table>;
/* u-boot puts hpen in SBC dmem at 0xb8 offset */
cpu-release-addr = <0x94100b8>;
};
};
cpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <784000>;
};
opp01 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <784000>;
};
opp02 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <784000>;
};
opp03 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <784000>;
};
opp04 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <784000>;
};
};
Annotation
- Immediate include surface: `stih418.dtsi`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.