arch/arm/boot/dts/st/stih418-clock.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stih418-clock.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stih418-clock.dtsi- Extension
.dtsi- Size
- 4406 bytes
- Lines
- 216
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/stih418-clks.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2015 STMicroelectronics R&D Limited
*/
#include <dt-bindings/clock/stih418-clks.h>
/ {
/*
* Fixed 30MHz oscillator inputs to SoC
*/
clk_sysin: clk-sysin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <30000000>;
clock-output-names = "CLK_SYSIN";
};
clk_tmdsout_hdmi: clk-tmdsout-hdmi {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "st,stih418-clk", "simple-bus";
/*
* A9 PLL.
*/
clockgen-a9@92b0000 {
compatible = "st,clkgen-c32";
reg = <0x92b0000 0x10000>;
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
compatible = "st,stih418-clkgen-plla9";
clocks = <&clk_sysin>;
};
/*
* ARM CPU related clocks.
*/
clk_m_a9: clk-m-a9 {
#clock-cells = <0>;
compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
clocks = <&clockgen_a9_pll 0>,
<&clockgen_a9_pll 0>,
<&clk_s_c0_flexgen 13>,
<&clk_m_a9_ext2f_div2>;
/*
* ARM Peripheral clock for timers
*/
arm_periph_clk: clk-m-a9-periphs {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&clk_m_a9>;
clock-div = <2>;
clock-mult = <1>;
};
};
};
clockgen-a@90ff000 {
compatible = "st,clkgen-c32";
Annotation
- Immediate include surface: `dt-bindings/clock/stih418-clks.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.