arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi- Extension
.dtsi- Size
- 4905 bytes
- Lines
- 226
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
stm32mp151.dtsistm32mp15-pinctrl.dtsistm32mp15xxad-pinctrl.dtsidt-bindings/gpio/gpio.hdt-bindings/input/input.hdt-bindings/leds/common.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) Protonic Holland
* Author: David Jander <david@protonic.nl>
*/
/dts-v1/;
#include "stm32mp151.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxad-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
ethernet0 = ðernet0;
mdio-gpio0 = &mdio0;
serial0 = &uart4;
};
led-controller-0 {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_INDICATOR;
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
/* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
* stmmac MDC clock without reducing system bus rate, we need to use
* gpio based MDIO bus.
*/
mdio0: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpioc 1 GPIO_ACTIVE_HIGH
&gpioa 2 GPIO_ACTIVE_HIGH>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&dts {
status = "okay";
};
ðernet0 {
pinctrl-0 = <ðernet0_rmii_pins_a>;
pinctrl-1 = <ðernet0_rmii_sleep_pins_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rmii";
status = "okay";
};
Annotation
- Immediate include surface: `stm32mp151.dtsi`, `stm32mp15-pinctrl.dtsi`, `stm32mp15xxad-pinctrl.dtsi`, `dt-bindings/gpio/gpio.h`, `dt-bindings/input/input.h`, `dt-bindings/leds/common.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.