arch/arm/boot/dts/st/stm32mp153.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stm32mp153.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stm32mp153.dtsi- Extension
.dtsi- Size
- 3157 bytes
- Lines
- 132
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
stm32mp151.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
*/
#include "stm32mp151.dtsi"
/ {
cpus {
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
clock-frequency = <650000000>;
device_type = "cpu";
reg = <1>;
};
};
arm-pmu {
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
};
&cs_funnel {
in-ports {
port@2 {
reg = <2>;
funnel_in_port2: endpoint {
remote-endpoint = <&etm1_out>;
};
};
};
};
&dbg_bus {
cs_cti_cpu1: cti@500d9000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x500d9000 0x1000>;
clocks = <&rcc CK_DBG>;
clock-names = "apb_pclk";
#address-cells = <1>;
#size-cells = <0>;
access-controllers = <&dbg_bus 0>;
status = "disabled";
trig-conns@0 {
reg = <0>;
arm,trig-in-sigs = <0 4 5>;
arm,trig-in-types = <PE_DBGTRIGGER
GEN_IO
GEN_IO>;
arm,trig-out-sigs = <0 7>;
arm,trig-out-types = <PE_EDBGREQ
PE_DBGRESTART>;
cpu = <&cpu1>;
};
trig-conns@2 {
reg = <2>;
arm,trig-in-sigs = <2 3 6>;
arm,trig-in-types = <ETM_EXTOUT
Annotation
- Immediate include surface: `stm32mp151.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.