arch/arm/boot/dts/st/stm32mp157a-dhcor-avenger96.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/st/stm32mp157a-dhcor-avenger96.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/st/stm32mp157a-dhcor-avenger96.dts- Extension
.dts- Size
- 955 bytes
- Lines
- 38
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
stm32mp157.dtsistm32mp15xx-dhcor-som.dtsistm32mp15xx-dhcor-avenger96.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*
* DHCOR STM32MP1 variant:
* DHCR-STM32MP157A-C065-R102-V18-SPI-C-01LG
* DHCOR PCB number: 586-100 or newer
* Avenger96 PCB number: 588-200 or newer
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-avenger96.dtsi"
/ {
model = "Arrow Electronics STM32MP157A Avenger96 board";
compatible = "arrow,stm32mp157a-avenger96", "dh,stm32mp157a-dhcor-som",
"st,stm32mp157";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_b>;
pinctrl-1 = <&m_can1_sleep_pins_b>;
status = "disabled";
};
&m_can2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can2_pins_a>;
pinctrl-1 = <&m_can2_sleep_pins_a>;
status = "disabled";
};
Annotation
- Immediate include surface: `stm32mp157.dtsi`, `stm32mp15xx-dhcor-som.dtsi`, `stm32mp15xx-dhcor-avenger96.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.