arch/arm/boot/dts/ti/davinci/da850-enbw-cmc.dts

File Facts

System

Linux kernel

Corpus path

arch/arm/boot/dts/ti/davinci/da850-enbw-cmc.dts

Extension

.dts

Size

702 bytes

Lines

45

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• da850.dtsi

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Device Tree for AM1808 EnBW CMC board
 *
 * Copyright 2012 DENX Software Engineering GmbH
 * Heiko Schocher <hs@denx.de>
 */
/dts-v1/;
#include "da850.dtsi"

/ {
	compatible = "enbw,cmc", "ti,da850";
	model = "EnBW CMC";

	soc@1c00000 {
		serial0: serial@42000 {
			status = "okay";
		};
		serial1: serial@10c000 {
			status = "okay";
		};
		serial2: serial@10d000 {
			status = "okay";
		};
		mdio: mdio@224000 {
			status = "okay";
		};
		eth0: ethernet@220000 {
			status = "okay";
		};
	};
};

&ref_clk {
	clock-frequency = <24000000>;
};

&edma0 {
	ti,edma-reserved-slot-ranges = <32 50>;
};

&edma1 {
	ti,edma-reserved-slot-ranges = <32 90>;
};

Annotation

• Immediate include surface: `da850.dtsi`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.