arch/arm/boot/dts/ti/keystone/keystone-k2hk.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/keystone/keystone-k2hk.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/keystone/keystone-k2hk.dtsi- Extension
.dtsi- Size
- 7582 bytes
- Lines
- 296
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/reset/ti-syscon.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Keystone 2 Kepler/Hawking soc specific device tree
*
* Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
/ {
compatible = "ti,k2hk", "ti,keystone";
model = "Texas Instruments Keystone 2 Kepler/Hawking SoC";
cpus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&gic>;
cpu@0 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
};
cpu@1 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <1>;
};
cpu@2 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <2>;
};
cpu@3 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <3>;
};
};
aliases {
rproc0 = &dsp0;
rproc1 = &dsp1;
rproc2 = &dsp2;
rproc3 = &dsp3;
rproc4 = &dsp4;
rproc5 = &dsp5;
rproc6 = &dsp6;
rproc7 = &dsp7;
};
};
&soc0 {
/include/ "keystone-k2hk-clocks.dtsi"
msm_ram: sram@c000000 {
compatible = "mmio-sram";
reg = <0x0c000000 0x600000>;
ranges = <0x0 0x0c000000 0x600000>;
#address-cells = <1>;
#size-cells = <1>;
bm-sram@5f0000 {
reg = <0x5f0000 0x8000>;
};
};
Annotation
- Immediate include surface: `dt-bindings/reset/ti-syscon.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.