arch/arm/boot/dts/ti/omap/am335x-moxa-uc-8100-common.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/am335x-moxa-uc-8100-common.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/am335x-moxa-uc-8100-common.dtsi- Extension
.dtsi- Size
- 10326 bytes
- Lines
- 422
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
am33xx.dtsi../../tps65910.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 MOXA Inc. - https://www.moxa.com/
*
* Author: Johnson Chen <johnsonch.chen@moxa.com>
*/
#include "am33xx.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
vbat: vbat-regulator {
compatible = "regulator-fixed";
};
/* Power supply provides a fixed 3.3V @3A */
vmmcsd_fixed: vmmcsd-regulator {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
buttons: push_button {
compatible = "gpio-keys";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&minipcie_pins>;
minipcie_pins: minipcie-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2_24 */
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
>;
};
push_button_pins: push-button-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
>;
};
i2c0_pins: i2c0-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
>;
};
i2c1_pins: i2c1-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_ctsn.i2c1_sda */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart0_rtsn.i2c1_scl */
>;
};
uart0_pins: uart0-pins {
Annotation
- Immediate include surface: `am33xx.dtsi`, `../../tps65910.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.