arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts- Extension
.dts- Size
- 14271 bytes
- Lines
- 695
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dra74x.dtsiam57xx-commercial-grade.dtsidra74x-mmc-iodelay.dtsidra74-ipu-dsp-common.dtsidt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/irq.hdt-bindings/pinctrl/dra.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2014-2019 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "dra74x.dtsi"
#include "am57xx-commercial-grade.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
#include "dra74-ipu-dsp-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/dra.h>
/ {
model = "BeagleBoard.org BeagleBone AI";
compatible = "beagle,am5729-beagleboneai", "ti,am5728",
"ti,dra742", "ti,dra74", "ti,dra7";
aliases {
rtc0 = &tps659038_rtc;
rtc1 = &rtc;
display0 = &hdmi_conn;
};
chosen {
stdout-path = &uart1;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ipu2_memory_region: ipu2-memory@95800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>;
reusable;
status = "okay";
};
dsp1_memory_region: dsp1-memory@99000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x99000000 0x0 0x4000000>;
reusable;
status = "okay";
};
ipu1_memory_region: ipu1-memory@9d000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable;
status = "okay";
};
dsp2_memory_region: dsp2-memory@9f000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9f000000 0x0 0x800000>;
reusable;
status = "okay";
};
};
Annotation
- Immediate include surface: `dra74x.dtsi`, `am57xx-commercial-grade.dtsi`, `dra74x-mmc-iodelay.dtsi`, `dra74-ipu-dsp-common.dtsi`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/pinctrl/dra.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.