arch/arm/boot/dts/ti/omap/dm8168-evm.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dm8168-evm.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/dm8168-evm.dts- Extension
.dts- Size
- 5789 bytes
- Lines
- 217
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dm816x.dtsidt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "dm816x.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "DM8168 EVM";
compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816";
chosen {
stdout-path = &uart3;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000 /* 1 GB */
0xc0000000 0x40000000>; /* 1 GB */
};
/* FDC6331L controlled by SD_POW pin */
vmmcsd_fixed: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
sata_refclk: fixedclock0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
};
&dm816x_pinmux {
mcspi1_pins: mcspi1-pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0a94, MUX_MODE0) /* SPI_SCLK */
DM816X_IOPAD(0x0a98, MUX_MODE0) /* SPI_SCS0 */
DM816X_IOPAD(0x0aa8, MUX_MODE0) /* SPI_D0 */
DM816X_IOPAD(0x0aac, MUX_MODE0) /* SPI_D1 */
>;
};
mmc_pins: mmc-pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0a70, MUX_MODE0) /* SD_POW */
DM816X_IOPAD(0x0a74, MUX_MODE0) /* SD_CLK */
DM816X_IOPAD(0x0a78, MUX_MODE0) /* SD_CMD */
DM816X_IOPAD(0x0a7C, MUX_MODE0) /* SD_DAT0 */
DM816X_IOPAD(0x0a80, MUX_MODE0) /* SD_DAT1 */
DM816X_IOPAD(0x0a84, MUX_MODE0) /* SD_DAT2 */
DM816X_IOPAD(0x0a88, MUX_MODE0) /* SD_DAT2 */
DM816X_IOPAD(0x0a8c, MUX_MODE2) /* GP1[7] */
DM816X_IOPAD(0x0a90, MUX_MODE2) /* GP1[8] */
>;
};
usb0_pins: usb0-pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB0_DRVVBUS */
>;
};
usb1_pins: usb1-pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0d08, MUX_MODE0) /* USB1_DRVVBUS */
>;
};
Annotation
- Immediate include surface: `dm816x.dtsi`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.