arch/arm/boot/dts/ti/omap/dra72-evm-revc.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dra72-evm-revc.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/dra72-evm-revc.dts- Extension
.dts- Size
- 3511 bytes
- Lines
- 158
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dra72-evm-common.dtsidra72x-mmc-iodelay.dtsidt-bindings/net/ti-dp83867.hdra72-evm-tps65917.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "dra72-evm-common.dtsi"
#include "dra72x-mmc-iodelay.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
/ {
model = "TI DRA722 Rev C EVM";
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ipu2_cma_pool: ipu2_cma@95800000 {
compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>;
reusable;
status = "okay";
};
dsp1_cma_pool: dsp1_cma@99000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x99000000 0x0 0x4000000>;
reusable;
status = "okay";
};
ipu1_cma_pool: ipu1_cma@9d000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable;
status = "okay";
};
};
evm_1v8_sw: fixedregulator-evm_1v8 {
compatible = "regulator-fixed";
regulator-name = "evm_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&smps4_reg>;
regulator-always-on;
regulator-boot-on;
};
};
&i2c1 {
tps65917: tps65917@58 {
reg = <0x58>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
};
};
#include "dra72-evm-tps65917.dtsi"
&ldo2_reg {
/* LDO2_OUT --> VDDA_1V8_PHY2 */
regulator-always-on;
regulator-boot-on;
};
Annotation
- Immediate include surface: `dra72-evm-common.dtsi`, `dra72x-mmc-iodelay.dtsi`, `dt-bindings/net/ti-dp83867.h`, `dra72-evm-tps65917.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.