arch/arm/boot/dts/ti/omap/dra72x.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dra72x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/dra72x.dtsi- Extension
.dtsi- Size
- 2165 bytes
- Lines
- 111
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dra7.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
*
* Based on "omap4.dtsi"
*/
#include "dra7.dtsi"
/ {
compatible = "ti,dra722", "ti,dra72", "ti,dra7";
aliases {
rproc0 = &ipu1;
rproc1 = &ipu2;
rproc2 = &dsp1;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupt-parent = <&wakeupgen>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
};
&l4_per2 {
target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
compatible = "ti,sysc-omap4", "ti,sysc";
reg = <0x5b000 0x4>,
<0x5b010 0x4>;
reg-names = "rev", "sysc";
ti,sysc-midle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>;
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>;
clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x5b000 0x1000>;
cal: cal@0 {
compatible = "ti,dra72-cal";
reg = <0x0000 0x400>,
<0x0800 0x40>,
<0x0900 0x40>;
reg-names = "cal_top",
"cal_rx_core0",
"cal_rx_core1";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
ti,camerrx-control = <&scm_conf 0xE94>;
ports {
#address-cells = <1>;
#size-cells = <0>;
csi2_0: port@0 {
reg = <0>;
};
csi2_1: port@1 {
reg = <1>;
};
};
};
};
};
&dss {
reg = <0 0x80>,
<0x4054 0x4>,
Annotation
- Immediate include surface: `dra7.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.