arch/arm/boot/dts/ti/omap/dra74x.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dra74x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/dra74x.dtsi- Extension
.dtsi- Size
- 5468 bytes
- Lines
- 233
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dra7.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
*
* Based on "omap4.dtsi"
*/
#include "dra7.dtsi"
/ {
compatible = "ti,dra742", "ti,dra74", "ti,dra7";
cpus {
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
operating-points-v2 = <&cpu0_opp_table>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
/* cooling options */
#cooling-cells = <2>; /* min followed by max */
vbb-supply = <&abb_mpu>;
};
};
aliases {
rproc0 = &ipu1;
rproc1 = &ipu2;
rproc2 = &dsp1;
rproc3 = &dsp2;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupt-parent = <&wakeupgen>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
};
ocp {
dsp2_system: dsp_system@41500000 {
compatible = "syscon";
reg = <0x41500000 0x100>;
};
target-module@41501000 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x41501000 0x4>,
<0x41501010 0x4>,
<0x41501014 0x4>;
reg-names = "rev", "sysc", "syss";
ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>;
ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
SYSC_OMAP2_SOFTRESET |
SYSC_OMAP2_AUTOIDLE)>;
clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
clock-names = "fck";
resets = <&prm_dsp2 1>;
reset-names = "rstctrl";
ranges = <0x0 0x41501000 0x1000>;
#size-cells = <1>;
Annotation
- Immediate include surface: `dra7.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.