arch/arm/boot/dts/ti/omap/dra76x.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dra76x.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/ti/omap/dra76x.dtsi
Extension
.dtsi
Size
3778 bytes
Lines
170
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "dra74x.dtsi"

/ {
	compatible = "ti,dra762", "ti,dra7";

	ocp {
		target-module@42c01900 {
			compatible = "ti,sysc-dra7-mcan", "ti,sysc";
			ranges = <0x0 0x42c00000 0x2000>;
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x42c01900 0x4>,
			      <0x42c01904 0x4>,
			      <0x42c01908 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
					 SYSC_DRA7_MCAN_ENAWAKEUP)>;
			ti,syss-mask = <1>;
			clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
			clock-names = "fck";

			m_can0: mcan@1a00 {
				compatible = "bosch,m_can";
				reg = <0x1a00 0x4000>, <0x0 0x18FC>;
				reg-names = "m_can", "message_ram";
				interrupt-parent = <&gic>;
				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "int0", "int1";
				clocks = <&l3_iclk_div>, <&mcan_clk>;
				clock-names = "hclk", "cclk";
				bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
			};
		};
	};

};

&l4_per3 {
	target-module@1b0000 {			/* 0x489b0000, ap 25 34.0 */
		compatible = "ti,sysc-omap4", "ti,sysc";
		reg = <0x1b0000 0x4>,
		      <0x1b0010 0x4>;
		reg-names = "rev", "sysc";
		ti,sysc-midle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>;
		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
				<SYSC_IDLE_NO>;
		clocks = <&cam_clkctrl DRA7_CAM_VIP3_CLKCTRL 0>;
		clock-names = "fck";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x1b0000 0x10000>;

		cal: cal@0 {
			compatible = "ti,dra76-cal";
			reg = <0x0000 0x400>,
			      <0x0800 0x40>,
			      <0x0900 0x40>;
			reg-names = "cal_top",
				    "cal_rx_core0",
				    "cal_rx_core1";
			interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
			ti,camerrx-control = <&scm_conf 0x6dc>;

Annotation

Implementation Notes