arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi- Extension
.dtsi- Size
- 54043 bytes
- Lines
- 2192
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Device Tree Source for DRA7xx clock data
*
* Copyright (C) 2013 Texas Instruments, Inc.
*/
&cm_core_aon_clocks {
atl_clkin0_ck: clock-atl-clkin0 {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
clock-output-names = "atl_clkin0_ck";
clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin1_ck: clock-atl-clkin1 {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
clock-output-names = "atl_clkin1_ck";
clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin2_ck: clock-atl-clkin2 {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
clock-output-names = "atl_clkin2_ck";
clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin3_ck: clock-atl-clkin3 {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
clock-output-names = "atl_clkin3_ck";
clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
hdmi_clkin_ck: clock-hdmi-clkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "hdmi_clkin_ck";
clock-frequency = <0>;
};
mlb_clkin_ck: clock-mlb-clkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "mlb_clkin_ck";
clock-frequency = <0>;
};
mlbp_clkin_ck: clock-mlbp-clkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "mlbp_clkin_ck";
clock-frequency = <0>;
};
pciesref_acs_clk_ck: clock-pciesref-acs {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "pciesref_acs_clk_ck";
clock-frequency = <100000000>;
};
ref_clkin0_ck: clock-ref-clkin0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "ref_clkin0_ck";
clock-frequency = <0>;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.