arch/arm/boot/dts/ti/omap/omap3-cm-t3517.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/omap3-cm-t3517.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/omap3-cm-t3517.dts- Extension
.dts- Size
- 3700 bytes
- Lines
- 159
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
am3517.dtsiomap3-cm-t3x.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Support for CompuLab CM-T3517
*/
/dts-v1/;
#include "am3517.dtsi"
#include "omap3-cm-t3x.dtsi"
/ {
model = "CompuLab CM-T3517";
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
vmmc: regulator-vmmc {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
wl12xx_vmmc2: wl12xx_vmmc2 {
compatible = "regulator-fixed";
regulator-name = "vw1271";
pinctrl-names = "default";
pinctrl-0 = <
&wl12xx_wkup_pins
&wl12xx_core_pins
>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
startup-delay-us = <20000>;
enable-active-high;
};
wl12xx_vaux2: wl12xx_vaux2 {
compatible = "regulator-fixed";
regulator-name = "vwl1271_vaux2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&omap3_pmx_wkup {
wl12xx_wkup_pins: wl12xx-wkup-pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
>;
};
};
&omap3_pmx_core {
phy1_reset_pins: hsusb1-phy-reset-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
>;
};
phy2_reset_pins: hsusb2-phy-reset-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
>;
};
otg_drv_vbus: otg-drv-vbus-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
Annotation
- Immediate include surface: `am3517.dtsi`, `omap3-cm-t3x.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.