arch/arm/boot/dts/ti/omap/omap3-igep0020-rev-f.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/omap3-igep0020-rev-f.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/omap3-igep0020-rev-f.dts- Extension
.dts- Size
- 1614 bytes
- Lines
- 60
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
omap3-igep0020-common.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
*
* Copyright (C) Javier Martinez Canillas <javier@dowhile0.org>
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
*/
#include "omap3-igep0020-common.dtsi"
/ {
model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
compatible = "isee,omap3-igep0020-rev-f", "ti,omap3630", "ti,omap3";
/* Regulator to trigger the WL_EN signal of the Wifi module */
lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
compatible = "regulator-fixed";
regulator-name = "regulator-lbep5clwmc-wlen";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - WL_EN */
enable-active-high;
};
};
&omap3_pmx_core {
lbep5clwmc_pins: lbep5clwmc-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4) /* mcspi1_cs3.gpio_177 - W_IRQ */
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - BT_EN */
OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - WL_EN */
>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
vmmc-supply = <&lbep5clwmc_wlen>;
bus-width = <4>;
non-removable;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio6>;
interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 177 */
};
};
&uart2 {
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* gpio 137 */
max-speed = <300000>;
};
};
Annotation
- Immediate include surface: `omap3-igep0020-common.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.