arch/arm/boot/dts/ti/omap/omap3-igep0030-common.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/omap3-igep0030-common.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/ti/omap/omap3-igep0030-common.dtsi
Extension
.dtsi
Size
3007 bytes
Lines
104
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Common Device Tree Source for IGEP COM MODULE
 *
 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
 */

#include "omap3-igep.dtsi"

/ {
	leds: gpio_leds {
		compatible = "gpio-leds";

		user0 {
			 label = "omap3:red:user0";
			 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;	/* LEDA */
			 default-state = "off";
		};

		user1 {
			 label = "omap3:green:user1";
			 gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;	/* LEDB */
			 default-state = "off";
		};

		user2 {
			 label = "omap3:red:user1";
			 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;		/* gpio_16 */
			 default-state = "off";
		};
	};

	hsusb2_phy: hsusb2-phy-pins {
		compatible = "usb-nop-xceiv";
		reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;		/* gpio_54 */
		#phy-cells = <0>;
	};
};

&omap3_pmx_core {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_pins>;

	hsusb2_pins: hsusb2-pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
		>;
	};

	uart2_pins: uart2-pins {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1)	/* mcbsp3_dx.uart2_cts */
			OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1)	/* mcbsp3_dr.uart2_rts */
			OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)	/* mcbsp3_clk.uart2_tx */
			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)	/* mcbsp3_fsx.uart2_rx */
		>;
	};
};

&omap3_pmx_core2 {
	pinctrl-names = "default";
	pinctrl-0 = <&hsusb2_core2_pins>;

	hsusb2_core2_pins: hsusb2-core2-pins {

Annotation

Implementation Notes