arch/arm/boot/dts/ti/omap/omap3-overo-common-peripherals.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/omap3-overo-common-peripherals.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/omap3-overo-common-peripherals.dtsi- Extension
.dtsi- Size
- 2024 bytes
- Lines
- 93
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
*/
/*
* Peripherals common to all Gumstix Overo boards (Tobi, Summit, Palo43,...)
*/
/ {
lis33_3v3: lis33-3v3-reg {
compatible = "regulator-fixed";
regulator-name = "lis33-3v3-reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
lis33_1v8: lis33-1v8-reg {
compatible = "regulator-fixed";
regulator-name = "lis33-1v8-reg";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&omap3_pmx_core {
i2c3_pins: i2c3-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
>;
};
uart3_pins: uart3-pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
clock-frequency = <100000>;
/* optional 1K EEPROM with revision information */
eeprom@51 {
compatible = "atmel,24c01";
reg = <0x51>;
pagesize = <8>;
};
lis33de: lis33de@1d {
compatible = "st,lis33de", "st,lis3lv02d";
reg = <0x1d>;
Vdd-supply = <&lis33_1v8>;
Vdd_IO-supply = <&lis33_3v3>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.