arch/arm/boot/dts/ti/omap/omap36xx-omap3430es2plus-clocks.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/ti/omap/omap36xx-omap3430es2plus-clocks.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/ti/omap/omap36xx-omap3430es2plus-clocks.dtsi- Extension
.dtsi- Size
- 5780 bytes
- Lines
- 244
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Device Tree Source for OMAP34xx/OMAP36xx clock data
*
* Copyright (C) 2013 Texas Instruments, Inc.
*/
&cm_clocks {
clock@a00 {
compatible = "ti,clksel";
reg = <0xa00>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock";
clock-output-names = "ssi_ssr_gate_fck_3430es2";
clocks = <&corex2_fck>;
};
};
clock@a40 {
compatible = "ti,clksel";
reg = <0xa40>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
ssi_ssr_div_fck_3430es2: clock-ssi-ssr-div-fck-3430es2@8 {
reg = <8>;
#clock-cells = <0>;
compatible = "ti,composite-divider-clock";
clock-output-names = "ssi_ssr_div_fck_3430es2";
clocks = <&corex2_fck>;
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
};
};
ssi_ssr_fck: ssi_ssr_fck_3430es2 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
};
ssi_sst_fck: ssi_sst_fck_3430es2 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&ssi_ssr_fck>;
clock-mult = <1>;
clock-div = <2>;
};
clock@a10 {
compatible = "ti,clksel";
reg = <0xa10>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
hsotgusb_ick_3430es2: clock-hsotgusb-ick-3430es2@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,omap3-hsotgusb-interface-clock";
clock-output-names = "hsotgusb_ick_3430es2";
clocks = <&core_l3_ick>;
};
ssi_ick: clock-ssi-ick-3430es2@0 {
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.