arch/arm/boot/dts/tps6507x.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/tps6507x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/tps6507x.dtsi- Extension
.dtsi- Size
- 732 bytes
- Lines
- 45
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*/
/*
* Integrated Power Management Chip
* http://www.ti.com/lit/ds/symlink/tps65070.pdf
*/
&tps {
compatible = "ti,tps6507x";
regulators {
#address-cells = <1>;
#size-cells = <0>;
vdcdc1_reg: regulator@0 {
reg = <0>;
regulator-compatible = "VDCDC1";
};
vdcdc2_reg: regulator@1 {
reg = <1>;
regulator-compatible = "VDCDC2";
};
vdcdc3_reg: regulator@2 {
reg = <2>;
regulator-compatible = "VDCDC3";
};
ldo1_reg: regulator@3 {
reg = <3>;
regulator-compatible = "LDO1";
};
ldo2_reg: regulator@4 {
reg = <4>;
regulator-compatible = "LDO2";
};
};
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.