arch/arm/include/asm/bitops.h
Source file repositories/reference/linux-study-clean/arch/arm/include/asm/bitops.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/include/asm/bitops.h- Extension
.h- Size
- 7732 bytes
- Lines
- 279
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
Dependency Surface
linux/compiler.hlinux/irqflags.hasm/barrier.hasm-generic/bitops/non-atomic.hasm-generic/bitops/__fls.hasm-generic/bitops/__ffs.hasm-generic/bitops/fls.hasm-generic/bitops/ffs.hasm-generic/bitops/builtin-__fls.hasm-generic/bitops/builtin-__ffs.hasm-generic/bitops/builtin-fls.hasm-generic/bitops/builtin-ffs.hasm-generic/bitops/ffz.hasm-generic/bitops/fls64.hasm-generic/bitops/sched.hasm-generic/bitops/hweight.hasm-generic/bitops/lock.hasm-generic/bitops/le.hasm-generic/bitops/ext2-atomic-setbit.h
Detected Declarations
function Torvaldsfunction ____atomic_clear_bitfunction ____atomic_change_bitfunction ____atomic_test_and_set_bitfunction ____atomic_test_and_clear_bitfunction ____atomic_test_and_change_bitfunction find_first_zero_bit_lefunction find_next_zero_bit_lefunction find_next_bit_le
Annotated Snippet
#ifndef __ASM_ARM_BITOPS_H
#define __ASM_ARM_BITOPS_H
#ifdef __KERNEL__
#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif
#include <linux/compiler.h>
#include <linux/irqflags.h>
#include <asm/barrier.h>
/*
* These functions are the basis of our bit ops.
*
* First, the atomic bitops. These use native endian.
*/
static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = BIT_MASK(bit);
p += BIT_WORD(bit);
raw_local_irq_save(flags);
*p |= mask;
raw_local_irq_restore(flags);
}
static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = BIT_MASK(bit);
p += BIT_WORD(bit);
raw_local_irq_save(flags);
*p &= ~mask;
raw_local_irq_restore(flags);
}
static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned long mask = BIT_MASK(bit);
p += BIT_WORD(bit);
raw_local_irq_save(flags);
*p ^= mask;
raw_local_irq_restore(flags);
}
static inline int
____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned int res;
unsigned long mask = BIT_MASK(bit);
p += BIT_WORD(bit);
raw_local_irq_save(flags);
res = *p;
*p = res | mask;
raw_local_irq_restore(flags);
return (res & mask) != 0;
}
static inline int
____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
{
unsigned long flags;
unsigned int res;
unsigned long mask = BIT_MASK(bit);
p += BIT_WORD(bit);
raw_local_irq_save(flags);
res = *p;
*p = res & ~mask;
raw_local_irq_restore(flags);
return (res & mask) != 0;
}
static inline int
____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
Annotation
- Immediate include surface: `linux/compiler.h`, `linux/irqflags.h`, `asm/barrier.h`, `asm-generic/bitops/non-atomic.h`, `asm-generic/bitops/__fls.h`, `asm-generic/bitops/__ffs.h`, `asm-generic/bitops/fls.h`, `asm-generic/bitops/ffs.h`.
- Detected declarations: `function Torvalds`, `function ____atomic_clear_bit`, `function ____atomic_change_bit`, `function ____atomic_test_and_set_bit`, `function ____atomic_test_and_clear_bit`, `function ____atomic_test_and_change_bit`, `function find_first_zero_bit_le`, `function find_next_zero_bit_le`, `function find_next_bit_le`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.