arch/arm/include/debug/brcmstb.S

Source file repositories/reference/linux-study-clean/arch/arm/include/debug/brcmstb.S

File Facts

System
Linux kernel
Corpus path
arch/arm/include/debug/brcmstb.S
Extension
.S
Size
5626 bytes
Lines
175
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: arch/arm
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <linux/serial_reg.h>
#include <asm/cputype.h>

/* Physical register offset and virtual register offset */
#define REG_PHYS_BASE		0xf0000000
#define REG_PHYS_BASE_V7	0x08000000
#define REG_VIRT_BASE		0xfc000000
#define REG_PHYS_ADDR(x)	((x) + REG_PHYS_BASE)
#define REG_PHYS_ADDR_V7(x)	((x) + REG_PHYS_BASE_V7)

/* Product id can be read from here */
#define SUN_TOP_CTRL_BASE	REG_PHYS_ADDR(0x404000)
#define SUN_TOP_CTRL_BASE_V7	REG_PHYS_ADDR_V7(0x404000)

#define UARTA_3390		REG_PHYS_ADDR(0x40a900)
#define UARTA_72116		UARTA_7255
#define UARTA_7250		REG_PHYS_ADDR(0x40b400)
#define UARTA_7255		REG_PHYS_ADDR(0x40c000)
#define UARTA_7260		UARTA_7255
#define UARTA_7268		UARTA_7255
#define UARTA_7271		UARTA_7268
#define UARTA_7278		REG_PHYS_ADDR_V7(0x40c000)
#define UARTA_7216		UARTA_7278
#define UARTA_72164		UARTA_7278
#define UARTA_72165		UARTA_7278
#define UARTA_7364		REG_PHYS_ADDR(0x40b000)
#define UARTA_7366		UARTA_7364
#define UARTA_74165		UARTA_7278
#define UARTA_74371		REG_PHYS_ADDR(0x406b00)
#define UARTA_7439		REG_PHYS_ADDR(0x40a900)
#define UARTA_7445		REG_PHYS_ADDR(0x40ab00)

#define UART_SHIFT		2

#define checkuart(rp, rv, family_id, family) \
		/* Load family id */ \
		ldr	rp, =family_id ; \
		/* Compare SUN_TOP_CTRL value against it */ \
		cmp	rp, rv ; \
		/* Passed test, load address */ \
		ldreq	rp, =UARTA_##family ; \
		/* Jump to save UART address */ \
		beq	91f

		.macro  addruart, rp, rv, tmp
		adr	\rp, 99f		@ actual addr of 99f
		ldr	\rv, [\rp]		@ linked addr is stored there
		sub	\rv, \rv, \rp		@ offset between the two
		ldr	\rp, [\rp, #4]		@ linked brcmstb_uart_config
		sub	\tmp, \rp, \rv		@ actual brcmstb_uart_config
		ldr	\rp, [\tmp]		@ Load brcmstb_uart_config
		cmp	\rp, #1			@ needs initialization?
		bne	100f			@ no; go load the addresses
		mov	\rv, #0			@ yes; record init is done
		str	\rv, [\tmp]

		/* Check for V7 memory map if B53 */
		mrc	p15, 0, \rv, c0, c0, 0	@ get Main ID register
		ldr	\rp, =ARM_CPU_PART_MASK
		and	\rv, \rv, \rp
		ldr	\rp, =ARM_CPU_PART_BRAHMA_B53	@ check for B53 CPU
		cmp	\rv, \rp
		bne	10f

		/* if PERIPHBASE doesn't overlap REG_PHYS_BASE use V7 map */
		mrc	p15, 1, \rv, c15, c3, 0	@ get PERIPHBASE from CBAR
		ands	\rv, \rv, #REG_PHYS_BASE
		ldreq	\rp, =SUN_TOP_CTRL_BASE_V7

		/* Check SUN_TOP_CTRL base */

Annotation

Implementation Notes