arch/arm/include/debug/imx-uart.h
Source file repositories/reference/linux-study-clean/arch/arm/include/debug/imx-uart.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/include/debug/imx-uart.h- Extension
.h- Size
- 5422 bytes
- Lines
- 143
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __DEBUG_IMX_UART_H
#define __DEBUG_IMX_UART_H
#define IMX1_UART1_BASE_ADDR 0x00206000
#define IMX1_UART2_BASE_ADDR 0x00207000
#define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR
#define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n)
#define IMX25_UART1_BASE_ADDR 0x43f90000
#define IMX25_UART2_BASE_ADDR 0x43f94000
#define IMX25_UART3_BASE_ADDR 0x5000c000
#define IMX25_UART4_BASE_ADDR 0x50008000
#define IMX25_UART5_BASE_ADDR 0x5002c000
#define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR
#define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n)
#define IMX27_UART1_BASE_ADDR 0x1000a000
#define IMX27_UART2_BASE_ADDR 0x1000b000
#define IMX27_UART3_BASE_ADDR 0x1000c000
#define IMX27_UART4_BASE_ADDR 0x1000d000
#define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR
#define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n)
#define IMX31_UART1_BASE_ADDR 0x43f90000
#define IMX31_UART2_BASE_ADDR 0x43f94000
#define IMX31_UART3_BASE_ADDR 0x5000c000
#define IMX31_UART4_BASE_ADDR 0x43fb0000
#define IMX31_UART5_BASE_ADDR 0x43fb4000
#define IMX31_UART_BASE_ADDR(n) IMX31_UART##n##_BASE_ADDR
#define IMX31_UART_BASE(n) IMX31_UART_BASE_ADDR(n)
#define IMX35_UART1_BASE_ADDR 0x43f90000
#define IMX35_UART2_BASE_ADDR 0x43f94000
#define IMX35_UART3_BASE_ADDR 0x5000c000
#define IMX35_UART_BASE_ADDR(n) IMX35_UART##n##_BASE_ADDR
#define IMX35_UART_BASE(n) IMX35_UART_BASE_ADDR(n)
#define IMX50_UART1_BASE_ADDR 0x53fbc000
#define IMX50_UART2_BASE_ADDR 0x53fc0000
#define IMX50_UART3_BASE_ADDR 0x5000c000
#define IMX50_UART4_BASE_ADDR 0x53ff0000
#define IMX50_UART5_BASE_ADDR 0x63f90000
#define IMX50_UART_BASE_ADDR(n) IMX50_UART##n##_BASE_ADDR
#define IMX50_UART_BASE(n) IMX50_UART_BASE_ADDR(n)
#define IMX51_UART1_BASE_ADDR 0x73fbc000
#define IMX51_UART2_BASE_ADDR 0x73fc0000
#define IMX51_UART3_BASE_ADDR 0x7000c000
#define IMX51_UART_BASE_ADDR(n) IMX51_UART##n##_BASE_ADDR
#define IMX51_UART_BASE(n) IMX51_UART_BASE_ADDR(n)
#define IMX53_UART1_BASE_ADDR 0x53fbc000
#define IMX53_UART2_BASE_ADDR 0x53fc0000
#define IMX53_UART3_BASE_ADDR 0x5000c000
#define IMX53_UART4_BASE_ADDR 0x53ff0000
#define IMX53_UART5_BASE_ADDR 0x63f90000
#define IMX53_UART_BASE_ADDR(n) IMX53_UART##n##_BASE_ADDR
#define IMX53_UART_BASE(n) IMX53_UART_BASE_ADDR(n)
#define IMX6Q_UART1_BASE_ADDR 0x02020000
#define IMX6Q_UART2_BASE_ADDR 0x021e8000
#define IMX6Q_UART3_BASE_ADDR 0x021ec000
#define IMX6Q_UART4_BASE_ADDR 0x021f0000
#define IMX6Q_UART5_BASE_ADDR 0x021f4000
#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
#define IMX6SL_UART1_BASE_ADDR 0x02020000
#define IMX6SL_UART2_BASE_ADDR 0x02024000
#define IMX6SL_UART3_BASE_ADDR 0x02034000
#define IMX6SL_UART4_BASE_ADDR 0x02038000
#define IMX6SL_UART5_BASE_ADDR 0x02018000
#define IMX6SL_UART_BASE_ADDR(n) IMX6SL_UART##n##_BASE_ADDR
#define IMX6SL_UART_BASE(n) IMX6SL_UART_BASE_ADDR(n)
#define IMX6SX_UART1_BASE_ADDR 0x02020000
#define IMX6SX_UART2_BASE_ADDR 0x021e8000
#define IMX6SX_UART3_BASE_ADDR 0x021ec000
#define IMX6SX_UART4_BASE_ADDR 0x021f0000
#define IMX6SX_UART5_BASE_ADDR 0x021f4000
#define IMX6SX_UART6_BASE_ADDR 0x022a0000
#define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR
#define IMX6SX_UART_BASE(n) IMX6SX_UART_BASE_ADDR(n)
#define IMX6UL_UART1_BASE_ADDR 0x02020000
#define IMX6UL_UART2_BASE_ADDR 0x021e8000
#define IMX6UL_UART3_BASE_ADDR 0x021ec000
#define IMX6UL_UART4_BASE_ADDR 0x021f0000
#define IMX6UL_UART5_BASE_ADDR 0x021f4000
#define IMX6UL_UART6_BASE_ADDR 0x021fc000Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.