arch/arm/kernel/devtree.c
Source file repositories/reference/linux-study-clean/arch/arm/kernel/devtree.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/kernel/devtree.c- Extension
.c- Size
- 5906 bytes
- Lines
- 239
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/export.hlinux/errno.hlinux/types.hlinux/memblock.hlinux/of.hlinux/of_fdt.hlinux/of_irq.hlinux/smp.hasm/cputype.hasm/setup.hasm/page.hasm/prom.hasm/smp_plat.hasm/mach/arch.hasm/mach-types.h
Detected Declarations
function set_smp_ops_by_methodfunction set_smp_ops_by_methodfunction arm_dt_init_cpu_mapsfunction for_each_of_cpu_nodefunction smp_setup_processor_idfunction arch_match_cpu_phys_idfunction arch_get_next_machfunction setup_machine_fdt
Annotated Snippet
if (!strcmp(m->method, method)) {
smp_set_ops(m->ops);
return 1;
}
return 0;
}
#else
static inline int set_smp_ops_by_method(struct device_node *node)
{
return 1;
}
#endif
/*
* arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
* and builds the cpu logical map array containing MPIDR values related to
* logical cpus
*
* Updates the cpu possible mask with the number of parsed cpu nodes
*/
void __init arm_dt_init_cpu_maps(void)
{
/*
* Temp logical map is initialized with UINT_MAX values that are
* considered invalid logical map entries since the logical map must
* contain a list of MPIDR[23:0] values where MPIDR[31:24] must
* read as 0.
*/
struct device_node *cpu, *cpus;
int found_method = 0;
u32 i, j, cpuidx = 1;
u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
bool bootcpu_valid = false;
cpus = of_find_node_by_path("/cpus");
if (!cpus)
return;
for_each_of_cpu_node(cpu) {
u32 hwid = of_get_cpu_hwid(cpu, 0);
pr_debug(" * %pOF...\n", cpu);
/*
* Bits n:24 must be set to 0 in the DT since the reg property
* defines the MPIDR[23:0].
*/
if (hwid & ~MPIDR_HWID_BITMASK) {
of_node_put(cpu);
return;
}
/*
* Duplicate MPIDRs are a recipe for disaster.
* Scan all initialized entries and check for
* duplicates. If any is found just bail out.
* temp values were initialized to UINT_MAX
* to avoid matching valid MPIDR[23:0] values.
*/
for (j = 0; j < cpuidx; j++)
if (WARN(tmp_map[j] == hwid,
"Duplicate /cpu reg properties in the DT\n")) {
of_node_put(cpu);
return;
}
/*
* Build a stashed array of MPIDR values. Numbering scheme
* requires that if detected the boot CPU must be assigned
* logical id 0. Other CPUs get sequential indexes starting
* from 1. If a CPU node with a reg property matching the
* boot CPU MPIDR is detected, this is recorded so that the
* logical map built from DT is validated and can be used
* to override the map created in smp_setup_processor_id().
*/
if (hwid == mpidr) {
i = 0;
bootcpu_valid = true;
} else {
i = cpuidx++;
}
if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
"max cores %u, capping them\n",
cpuidx, nr_cpu_ids)) {
cpuidx = nr_cpu_ids;
Annotation
- Immediate include surface: `linux/init.h`, `linux/export.h`, `linux/errno.h`, `linux/types.h`, `linux/memblock.h`, `linux/of.h`, `linux/of_fdt.h`, `linux/of_irq.h`.
- Detected declarations: `function set_smp_ops_by_method`, `function set_smp_ops_by_method`, `function arm_dt_init_cpu_maps`, `function for_each_of_cpu_node`, `function smp_setup_processor_id`, `function arch_match_cpu_phys_id`, `function arch_get_next_mach`, `function setup_machine_fdt`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.