arch/arm/kernel/hw_breakpoint.c
Source file repositories/reference/linux-study-clean/arch/arm/kernel/hw_breakpoint.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/kernel/hw_breakpoint.c- Extension
.c- Size
- 30844 bytes
- Lines
- 1267
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/errno.hlinux/hardirq.hlinux/perf_event.hlinux/hw_breakpoint.hlinux/smp.hlinux/cfi.hlinux/cpu_pm.hlinux/coresight.hasm/cacheflush.hasm/cputype.hasm/current.hasm/hw_breakpoint.hasm/traps.h
Detected Declarations
function read_wb_regfunction write_wb_regfunction get_debug_archfunction arch_get_debug_archfunction debug_arch_supportedfunction debug_exception_updates_fsrfunction get_num_wrp_resourcesfunction get_num_brp_resourcesfunction core_has_mismatch_brpsfunction get_num_wrpsfunction get_num_brpsfunction monitor_mode_enabledfunction enable_monitor_modefunction hw_breakpoint_slotsfunction get_max_wp_lenfunction arch_get_max_wp_lenfunction arch_install_hw_breakpointfunction arch_uninstall_hw_breakpointfunction get_hbp_lenfunction arch_check_bp_in_kernelspacefunction arch_bp_generic_fieldsfunction arch_build_bp_infofunction hw_breakpoint_arch_parsefunction enable_single_stepfunction disable_single_stepfunction get_distance_from_watchpointfunction watchpoint_fault_on_uaccessfunction watchpoint_handlerfunction watchpoint_single_step_handlerfunction breakpoint_handlerfunction hw_breakpoint_cfi_handlerfunction hw_breakpoint_cfi_handlerfunction debug_oslsr_trapfunction debug_reg_trapfunction core_has_os_save_restorefunction reset_ctrl_regsfunction dbg_reset_onlinefunction dbg_cpu_pm_notifyfunction pm_initfunction pm_initfunction CPUsfunction hw_breakpoint_pmu_read
Annotated Snippet
if (!*slot) {
*slot = bp;
break;
}
}
if (i == max_slots) {
pr_warn("Can't find any breakpoint slot\n");
return -EBUSY;
}
/* Override the breakpoint data with the step data. */
if (info->step_ctrl.enabled) {
addr = info->trigger & ~0x3;
ctrl = encode_ctrl_reg(info->step_ctrl);
if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE) {
i = 0;
ctrl_base = ARM_BASE_BCR + core_num_brps;
val_base = ARM_BASE_BVR + core_num_brps;
}
}
/* Setup the address register. */
write_wb_reg(val_base + i, addr);
/* Setup the control register. */
write_wb_reg(ctrl_base + i, ctrl);
return 0;
}
void arch_uninstall_hw_breakpoint(struct perf_event *bp)
{
struct arch_hw_breakpoint *info = counter_arch_bp(bp);
struct perf_event **slot, **slots;
int i, max_slots, base;
if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) {
/* Breakpoint */
base = ARM_BASE_BCR;
slots = this_cpu_ptr(bp_on_reg);
max_slots = core_num_brps;
} else {
/* Watchpoint */
base = ARM_BASE_WCR;
slots = this_cpu_ptr(wp_on_reg);
max_slots = core_num_wrps;
}
/* Remove the breakpoint. */
for (i = 0; i < max_slots; ++i) {
slot = &slots[i];
if (*slot == bp) {
*slot = NULL;
break;
}
}
if (i == max_slots) {
pr_warn("Can't find any breakpoint slot\n");
return;
}
/* Ensure that we disable the mismatch breakpoint. */
if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE &&
info->step_ctrl.enabled) {
i = 0;
base = ARM_BASE_BCR + core_num_brps;
}
/* Reset the control register. */
write_wb_reg(base + i, 0);
}
static int get_hbp_len(u8 hbp_len)
{
unsigned int len_in_bytes = 0;
switch (hbp_len) {
case ARM_BREAKPOINT_LEN_1:
len_in_bytes = 1;
break;
case ARM_BREAKPOINT_LEN_2:
len_in_bytes = 2;
break;
case ARM_BREAKPOINT_LEN_4:
len_in_bytes = 4;
break;
case ARM_BREAKPOINT_LEN_8:
len_in_bytes = 8;
Annotation
- Immediate include surface: `linux/errno.h`, `linux/hardirq.h`, `linux/perf_event.h`, `linux/hw_breakpoint.h`, `linux/smp.h`, `linux/cfi.h`, `linux/cpu_pm.h`, `linux/coresight.h`.
- Detected declarations: `function read_wb_reg`, `function write_wb_reg`, `function get_debug_arch`, `function arch_get_debug_arch`, `function debug_arch_supported`, `function debug_exception_updates_fsr`, `function get_num_wrp_resources`, `function get_num_brp_resources`, `function core_has_mismatch_brps`, `function get_num_wrps`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.