arch/arm/mach-alpine/alpine_cpu_resume.h
Source file repositories/reference/linux-study-clean/arch/arm/mach-alpine/alpine_cpu_resume.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-alpine/alpine_cpu_resume.h- Extension
.h- Size
- 692 bytes
- Lines
- 30
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct al_cpu_resume_regs_per_cpustruct al_cpu_resume_regs
Annotated Snippet
struct al_cpu_resume_regs_per_cpu {
uint32_t flags;
uint32_t resume_addr;
};
/* general regs */
struct al_cpu_resume_regs {
/* Watermark for validating the CPU resume struct */
uint32_t watermark;
uint32_t flags;
struct al_cpu_resume_regs_per_cpu per_cpu[];
};
/* The expected magic number for validating the resume addresses */
#define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200
#define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00
#endif /* ALPINE_CPU_RESUME_H_ */
Annotation
- Detected declarations: `struct al_cpu_resume_regs_per_cpu`, `struct al_cpu_resume_regs`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.