arch/arm/mach-at91/sama5.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-at91/sama5.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-at91/sama5.c- Extension
.c- Size
- 1517 bytes
- Lines
- 65
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/hardware/cache-l2x0.hasm/mach/arch.hasm/mach/map.hasm/outercache.hasm/system_misc.hgeneric.hsam_secure.h
Detected Declarations
function Copyright
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Setup code for SAMA5
*
* Copyright (C) 2013 Atmel,
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
*/
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/outercache.h>
#include <asm/system_misc.h>
#include "generic.h"
#include "sam_secure.h"
static void sama5_l2c310_write_sec(unsigned long val, unsigned reg)
{
/* OP-TEE configures the L2 cache and does not allow modifying it yet */
}
static void __init sama5_secure_cache_init(void)
{
sam_secure_init();
if (IS_ENABLED(CONFIG_OUTER_CACHE) && sam_linux_is_optee_available())
outer_cache.write_sec = sama5_l2c310_write_sec;
}
static const char *const sama5_dt_board_compat[] __initconst = {
"atmel,sama5",
NULL
};
DT_MACHINE_START(sama5_dt, "Atmel SAMA5")
/* Maintainer: Atmel */
.init_late = sama5_pm_init,
.dt_compat = sama5_dt_board_compat,
MACHINE_END
static const char *const sama5_alt_dt_board_compat[] __initconst = {
"atmel,sama5d4",
NULL
};
DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5")
/* Maintainer: Atmel */
.init_late = sama5_pm_init,
.dt_compat = sama5_alt_dt_board_compat,
.l2c_aux_mask = ~0UL,
MACHINE_END
static const char *const sama5d2_compat[] __initconst = {
"atmel,sama5d2",
NULL
};
DT_MACHINE_START(sama5d2, "Atmel SAMA5")
/* Maintainer: Atmel */
.init_early = sama5_secure_cache_init,
.init_late = sama5d2_pm_init,
.dt_compat = sama5d2_compat,
.l2c_aux_mask = ~0UL,
MACHINE_END
Annotation
- Immediate include surface: `asm/hardware/cache-l2x0.h`, `asm/mach/arch.h`, `asm/mach/map.h`, `asm/outercache.h`, `asm/system_misc.h`, `generic.h`, `sam_secure.h`.
- Detected declarations: `function Copyright`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.