arch/arm/mach-berlin/berlin.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-berlin/berlin.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-berlin/berlin.c- Extension
.c- Size
- 614 bytes
- Lines
- 27
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
asm/mach/arch.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree support for Marvell Berlin SoCs.
*
* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
*
* based on GPL'ed 2.6 kernel sources
* (c) Marvell International Ltd.
*/
#include <asm/mach/arch.h>
static const char * const berlin_dt_compat[] = {
"marvell,berlin",
NULL,
};
DT_MACHINE_START(BERLIN_DT, "Marvell Berlin")
.dt_compat = berlin_dt_compat,
/*
* with DT probing for L2CCs, berlin_init_machine can be removed.
* Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc
*/
.l2c_aux_val = 0x30c00000,
.l2c_aux_mask = 0xfeffffff,
MACHINE_END
Annotation
- Immediate include surface: `asm/mach/arch.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.