arch/arm/mach-dove/dove.h

Source file repositories/reference/linux-study-clean/arch/arm/mach-dove/dove.h

File Facts

System
Linux kernel
Corpus path
arch/arm/mach-dove/dove.h
Extension
.h
Size
6840 bytes
Lines
186
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __ASM_ARCH_DOVE_H
#define __ASM_ARCH_DOVE_H

#include "irqs.h"

/*
 * Marvell Dove address maps.
 *
 * phys		virt		size
 * c8000000	fdb00000	1M	Cryptographic SRAM
 * e0000000	@runtime	128M	PCIe-0 Memory space
 * e8000000	@runtime	128M	PCIe-1 Memory space
 * f1000000	fec00000	1M	on-chip south-bridge registers
 * f1800000	fe400000	8M	on-chip north-bridge registers
 * f2000000	fee00000	1M	PCIe-0 I/O space
 * f2100000	fef00000	1M	PCIe-1 I/O space
 */

#define DOVE_CESA_PHYS_BASE		0xc8000000
#define DOVE_CESA_VIRT_BASE		IOMEM(0xfdb00000)
#define DOVE_CESA_SIZE			SZ_1M

#define DOVE_PCIE0_MEM_PHYS_BASE	0xe0000000
#define DOVE_PCIE0_MEM_SIZE		SZ_128M

#define DOVE_PCIE1_MEM_PHYS_BASE	0xe8000000
#define DOVE_PCIE1_MEM_SIZE		SZ_128M

#define DOVE_BOOTROM_PHYS_BASE		0xf8000000
#define DOVE_BOOTROM_SIZE		SZ_128M

#define DOVE_SCRATCHPAD_PHYS_BASE	0xf0000000
#define DOVE_SCRATCHPAD_VIRT_BASE	IOMEM(0xfdd00000)
#define DOVE_SCRATCHPAD_SIZE		SZ_1M

#define DOVE_SB_REGS_PHYS_BASE		0xf1000000
#define DOVE_SB_REGS_VIRT_BASE		IOMEM(0xfec00000)
#define DOVE_SB_REGS_SIZE		SZ_1M

#define DOVE_NB_REGS_PHYS_BASE		0xf1800000
#define DOVE_NB_REGS_VIRT_BASE		IOMEM(0xfe400000)
#define DOVE_NB_REGS_SIZE		SZ_8M

#define DOVE_PCIE0_IO_PHYS_BASE		0xf2000000
#define DOVE_PCIE0_IO_BUS_BASE		0x00000000
#define DOVE_PCIE0_IO_SIZE		SZ_64K

#define DOVE_PCIE1_IO_PHYS_BASE		0xf2100000
#define DOVE_PCIE1_IO_BUS_BASE		0x00010000
#define DOVE_PCIE1_IO_SIZE		SZ_64K

/*
 * Dove Core Registers Map
 */

/* SPI, I2C, UART */
#define DOVE_I2C_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x11000)
#define DOVE_UART0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x12000)
#define DOVE_UART0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x12000)
#define DOVE_UART1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x12100)
#define DOVE_UART1_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x12100)
#define DOVE_UART2_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x12200)
#define DOVE_UART2_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x12200)
#define DOVE_UART3_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x12300)
#define DOVE_UART3_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x12300)
#define DOVE_SPI0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x10600)
#define DOVE_SPI1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x14600)

/* North-South Bridge */
#define BRIDGE_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x20000)
#define BRIDGE_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x20000)
#define  BRIDGE_WINS_BASE       (BRIDGE_PHYS_BASE)
#define  BRIDGE_WINS_SZ         (0x80)

/* Cryptographic Engine */
#define DOVE_CRYPT_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x30000)

/* PCIe 0 */
#define DOVE_PCIE0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x40000)

/* USB */
#define DOVE_USB0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x50000)
#define DOVE_USB1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x51000)

/* XOR 0 Engine */
#define DOVE_XOR0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x60800)
#define DOVE_XOR0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x60800)
#define DOVE_XOR0_HIGH_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE + 0x60A00)
#define DOVE_XOR0_HIGH_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE + 0x60A00)

Annotation

Implementation Notes