arch/arm/mach-dove/mpp.h
Source file repositories/reference/linux-study-clean/arch/arm/mach-dove/mpp.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-dove/mpp.h- Extension
.h- Size
- 6676 bytes
- Lines
- 198
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum dove_mpp_grp_idx
Annotated Snippet
#ifndef __ARCH_DOVE_MPP_CODED_H
#define __ARCH_DOVE_MPP_CODED_H
#define MPP(_num, _sel, _in, _out) ( \
/* MPP number */ ((_num) & 0xff) | \
/* MPP select value */ (((_sel) & 0xf) << 8) | \
/* may be input signal */ ((!!(_in)) << 12) | \
/* may be output signal */ ((!!(_out)) << 13))
#define MPP0_GPIO0 MPP(0, 0x0, 1, 1)
#define MPP0_UA2_RTSn MPP(0, 0x2, 0, 0)
#define MPP0_SDIO0_CD MPP(0, 0x3, 0, 0)
#define MPP0_LCD0_PWM MPP(0, 0xf, 0, 0)
#define MPP1_GPIO1 MPP(1, 0x0, 1, 1)
#define MPP1_UA2_CTSn MPP(1, 0x2, 0, 0)
#define MPP1_SDIO0_WP MPP(1, 0x3, 0, 0)
#define MPP1_LCD1_PWM MPP(1, 0xf, 0, 0)
#define MPP2_GPIO2 MPP(2, 0x0, 1, 1)
#define MPP2_SATA_PRESENT MPP(2, 0x1, 0, 0)
#define MPP2_UA2_TXD MPP(2, 0x2, 0, 0)
#define MPP2_SDIO0_BUS_POWER MPP(2, 0x3, 0, 0)
#define MPP2_UA_RTSn1 MPP(2, 0x4, 0, 0)
#define MPP3_GPIO3 MPP(3, 0x0, 1, 1)
#define MPP3_SATA_ACT MPP(3, 0x1, 0, 0)
#define MPP3_UA2_RXD MPP(3, 0x2, 0, 0)
#define MPP3_SDIO0_LED_CTRL MPP(3, 0x3, 0, 0)
#define MPP3_UA_CTSn1 MPP(3, 0x4, 0, 0)
#define MPP3_SPI_LCD_CS1 MPP(3, 0xf, 0, 0)
#define MPP4_GPIO4 MPP(4, 0x0, 1, 1)
#define MPP4_UA3_RTSn MPP(4, 0x2, 0, 0)
#define MPP4_SDIO1_CD MPP(4, 0x3, 0, 0)
#define MPP4_SPI_1_MISO MPP(4, 0x4, 0, 0)
#define MPP5_GPIO5 MPP(5, 0x0, 1, 1)
#define MPP5_UA3_CTSn MPP(5, 0x2, 0, 0)
#define MPP5_SDIO1_WP MPP(5, 0x3, 0, 0)
#define MPP5_SPI_1_CS MPP(5, 0x4, 0, 0)
#define MPP6_GPIO6 MPP(6, 0x0, 1, 1)
#define MPP6_UA3_TXD MPP(6, 0x2, 0, 0)
#define MPP6_SDIO1_BUS_POWER MPP(6, 0x3, 0, 0)
#define MPP6_SPI_1_MOSI MPP(6, 0x4, 0, 0)
#define MPP7_GPIO7 MPP(7, 0x0, 1, 1)
#define MPP7_UA3_RXD MPP(7, 0x2, 0, 0)
#define MPP7_SDIO1_LED_CTRL MPP(7, 0x3, 0, 0)
#define MPP7_SPI_1_SCK MPP(7, 0x4, 0, 0)
#define MPP8_GPIO8 MPP(8, 0x0, 1, 1)
#define MPP8_WD_RST_OUT MPP(8, 0x1, 0, 0)
#define MPP9_GPIO9 MPP(9, 0x0, 1, 1)
#define MPP9_PEX1_CLKREQn MPP(9, 0x5, 0, 0)
#define MPP10_GPIO10 MPP(10, 0x0, 1, 1)
#define MPP10_SSP_SCLK MPP(10, 0x5, 0, 0)
#define MPP11_GPIO11 MPP(11, 0x0, 1, 1)
#define MPP11_SATA_PRESENT MPP(11, 0x1, 0, 0)
#define MPP11_SATA_ACT MPP(11, 0x2, 0, 0)
#define MPP11_SDIO0_LED_CTRL MPP(11, 0x3, 0, 0)
#define MPP11_SDIO1_LED_CTRL MPP(11, 0x4, 0, 0)
#define MPP11_PEX0_CLKREQn MPP(11, 0x5, 0, 0)
#define MPP12_GPIO12 MPP(12, 0x0, 1, 1)
#define MPP12_SATA_ACT MPP(12, 0x1, 0, 0)
#define MPP12_UA2_RTSn MPP(12, 0x2, 0, 0)
#define MPP12_AD0_I2S_EXT_MCLK MPP(12, 0x3, 0, 0)
#define MPP12_SDIO1_CD MPP(12, 0x4, 0, 0)
#define MPP13_GPIO13 MPP(13, 0x0, 1, 1)
#define MPP13_UA2_CTSn MPP(13, 0x2, 0, 0)
#define MPP13_AD1_I2S_EXT_MCLK MPP(13, 0x3, 0, 0)
#define MPP13_SDIO1WP MPP(13, 0x4, 0, 0)
#define MPP13_SSP_EXTCLK MPP(13, 0x5, 0, 0)
#define MPP14_GPIO14 MPP(14, 0x0, 1, 1)
#define MPP14_UA2_TXD MPP(14, 0x2, 0, 0)
#define MPP14_SDIO1_BUS_POWER MPP(14, 0x4, 0, 0)
#define MPP14_SSP_RXD MPP(14, 0x5, 0, 0)
#define MPP15_GPIO15 MPP(15, 0x0, 1, 1)
#define MPP15_UA2_RXD MPP(15, 0x2, 0, 0)
#define MPP15_SDIO1_LED_CTRL MPP(15, 0x4, 0, 0)
#define MPP15_SSP_SFRM MPP(15, 0x5, 0, 0)
Annotation
- Detected declarations: `enum dove_mpp_grp_idx`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.