arch/arm/mach-exynos/pm.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-exynos/pm.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-exynos/pm.c- Extension
.c- Size
- 7300 bytes
- Lines
- 339
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/suspend.hlinux/cpu_pm.hlinux/io.hlinux/of.hlinux/soc/samsung/exynos-regs-pmu.hlinux/soc/samsung/exynos-pmu.hasm/firmware.hasm/smp_scu.hasm/suspend.hasm/cacheflush.hcommon.h
Detected Declarations
function exynos_cpu_save_registerfunction exynos_cpu_restore_registerfunction exynos_pm_central_suspendfunction exynos_pm_central_resumefunction exynos_set_wakeupmaskfunction exynos_cpu_set_boot_vectorfunction exynos_aftr_finisherfunction exynos_enter_aftrfunction exynos_cpu0_enter_aftrfunction exynos_wfi_finisherfunction exynos_cpu1_powerdownfunction exynos_pre_enter_aftrfunction exynos_post_enter_aftr
Annotated Snippet
while (exynos_cpu_power_state(1)) {
unsigned long boot_addr;
/*
* The other cpu may skip idle and boot back
* up again
*/
if (atomic_read(&cpu1_wakeup))
goto abort;
/*
* The other cpu may bounce through idle and
* boot back up again, getting stuck in the
* boot rom code
*/
ret = exynos_get_boot_addr(1, &boot_addr);
if (ret)
goto fail;
ret = -1;
if (boot_addr == 0)
goto abort;
cpu_relax();
}
}
exynos_enter_aftr();
ret = 0;
abort:
if (cpu_online(1)) {
unsigned long boot_addr = __pa_symbol(exynos_cpu_resume);
/*
* Set the boot vector to something non-zero
*/
ret = exynos_set_boot_addr(1, boot_addr);
if (ret)
goto fail;
dsb();
/*
* Turn on cpu1 and wait for it to be on
*/
exynos_cpu_power_up(1);
while (exynos_cpu_power_state(1) != S5P_CORE_LOCAL_PWR_EN)
cpu_relax();
if (soc_is_exynos3250()) {
while (!pmu_raw_readl(S5P_PMU_SPARE2) &&
!atomic_read(&cpu1_wakeup))
cpu_relax();
if (!atomic_read(&cpu1_wakeup))
exynos_core_restart(1);
}
while (!atomic_read(&cpu1_wakeup)) {
smp_rmb();
/*
* Poke cpu1 out of the boot rom
*/
ret = exynos_set_boot_addr(1, boot_addr);
if (ret)
goto fail;
call_firmware_op(cpu_boot, 1);
dsb_sev();
}
}
fail:
return ret;
}
static int exynos_wfi_finisher(unsigned long flags)
{
if (soc_is_exynos3250())
flush_cache_all();
cpu_do_idle();
return -1;
}
static int exynos_cpu1_powerdown(void)
{
int ret = -1;
/*
Annotation
- Immediate include surface: `linux/init.h`, `linux/suspend.h`, `linux/cpu_pm.h`, `linux/io.h`, `linux/of.h`, `linux/soc/samsung/exynos-regs-pmu.h`, `linux/soc/samsung/exynos-pmu.h`, `asm/firmware.h`.
- Detected declarations: `function exynos_cpu_save_register`, `function exynos_cpu_restore_register`, `function exynos_pm_central_suspend`, `function exynos_pm_central_resume`, `function exynos_set_wakeupmask`, `function exynos_cpu_set_boot_vector`, `function exynos_aftr_finisher`, `function exynos_enter_aftr`, `function exynos_cpu0_enter_aftr`, `function exynos_wfi_finisher`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.