arch/arm/mach-footbridge/dc21285.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-footbridge/dc21285.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-footbridge/dc21285.c- Extension
.c- Size
- 8641 bytes
- Lines
- 361
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-map-ops.hlinux/kernel.hlinux/pci.hlinux/interrupt.hlinux/mm.hlinux/slab.hlinux/init.hlinux/ioport.hlinux/irq.hlinux/io.hlinux/spinlock.hasm/irq.hasm/mach/pci.hasm/hardware/dec21285.h
Detected Declarations
function dc21285_base_addressfunction dc21285_read_configfunction dc21285_write_configfunction dc21285_enable_errorfunction dc21285_abort_irqfunction dc21285_serr_irqfunction dc21285_discard_irqfunction dc21285_dparity_irqfunction dc21285_parity_irqfunction dc21285_pci_bus_notifierfunction dc21285_setupfunction dc21285_preinitfunction dc21285_postinit
Annotated Snippet
switch (size) {
case 1:
asm volatile("ldrb %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
case 2:
asm volatile("ldrh %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
case 4:
asm volatile("ldr %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where) : "cc");
break;
}
*value = v;
v = *CSR_PCICMD;
if (v & PCICMD_ABORT) {
*CSR_PCICMD = v & (0xffff|PCICMD_ABORT);
return -1;
}
return PCIBIOS_SUCCESSFUL;
}
static int
dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 value)
{
unsigned long addr = dc21285_base_address(bus, devfn);
u32 v;
if (addr)
switch (size) {
case 1:
asm volatile("strb %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
case 2:
asm volatile("strh %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
case 4:
asm volatile("str %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where)
: "cc");
break;
}
v = *CSR_PCICMD;
if (v & PCICMD_ABORT) {
*CSR_PCICMD = v & (0xffff|PCICMD_ABORT);
return -1;
}
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops dc21285_ops = {
.read = dc21285_read_config,
.write = dc21285_write_config,
};
static struct timer_list serr_timer;
static struct timer_list perr_timer;
static void dc21285_enable_error(struct timer_list *timer)
{
timer_delete(timer);
if (timer == &serr_timer)
enable_irq(IRQ_PCI_SERR);
else if (timer == &perr_timer)
enable_irq(IRQ_PCI_PERR);
}
/*
* Warn on PCI errors.
*/
static irqreturn_t dc21285_abort_irq(int irq, void *dev_id)
{
unsigned int cmd;
unsigned int status;
cmd = *CSR_PCICMD;
status = cmd >> 16;
cmd = cmd & 0xffff;
Annotation
- Immediate include surface: `linux/dma-map-ops.h`, `linux/kernel.h`, `linux/pci.h`, `linux/interrupt.h`, `linux/mm.h`, `linux/slab.h`, `linux/init.h`, `linux/ioport.h`.
- Detected declarations: `function dc21285_base_address`, `function dc21285_read_config`, `function dc21285_write_config`, `function dc21285_enable_error`, `function dc21285_abort_irq`, `function dc21285_serr_irq`, `function dc21285_discard_irq`, `function dc21285_dparity_irq`, `function dc21285_parity_irq`, `function dc21285_pci_bus_notifier`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.