arch/arm/mach-imx/cpu-imx5.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-imx/cpu-imx5.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-imx/cpu-imx5.c- Extension
.c- Size
- 3083 bytes
- Lines
- 160
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/kernel.hlinux/init.hlinux/module.hlinux/io.hlinux/of.hlinux/of_address.hhardware.hcommon.h
Detected Declarations
function imx5_read_srev_regfunction get_mx51_srevfunction mx51_revisionfunction mx51_neon_fixupfunction get_mx53_srevfunction mx53_revisionfunction imx5_pmu_initexport mx51_revisionexport mx53_revision
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This file contains the CPU initialization code.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "hardware.h"
#include "common.h"
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
static u32 imx5_read_srev_reg(const char *compat)
{
void __iomem *iim_base;
struct device_node *np;
u32 srev;
np = of_find_compatible_node(NULL, NULL, compat);
iim_base = of_iomap(np, 0);
of_node_put(np);
WARN_ON(!iim_base);
srev = readl(iim_base + IIM_SREV) & 0xff;
iounmap(iim_base);
return srev;
}
static int get_mx51_srev(void)
{
u32 rev = imx5_read_srev_reg("fsl,imx51-iim");
switch (rev) {
case 0x0:
return IMX_CHIP_REVISION_2_0;
case 0x10:
return IMX_CHIP_REVISION_3_0;
default:
return IMX_CHIP_REVISION_UNKNOWN;
}
}
/*
* Returns:
* the silicon revision of the cpu
*/
int mx51_revision(void)
{
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx51_srev();
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx51_revision);
#ifdef CONFIG_NEON
/*
* All versions of the silicon before Rev. 3 have broken NEON implementations.
* Dependent on link order - so the assumption is that vfp_init is called
* before us.
*/
int __init mx51_neon_fixup(void)
{
if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
(elf_hwcap & HWCAP_NEON)) {
elf_hwcap &= ~HWCAP_NEON;
pr_info("Turning off NEON support, detected broken NEON implementation\n");
}
return 0;
}
#endif
static int get_mx53_srev(void)
{
u32 rev = imx5_read_srev_reg("fsl,imx53-iim");
Annotation
- Immediate include surface: `linux/types.h`, `linux/kernel.h`, `linux/init.h`, `linux/module.h`, `linux/io.h`, `linux/of.h`, `linux/of_address.h`, `hardware.h`.
- Detected declarations: `function imx5_read_srev_reg`, `function get_mx51_srev`, `function mx51_revision`, `function mx51_neon_fixup`, `function get_mx53_srev`, `function mx53_revision`, `function imx5_pmu_init`, `export mx51_revision`, `export mx53_revision`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.