arch/arm/mach-imx/mach-imx7ulp.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-imx/mach-imx7ulp.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-imx/mach-imx7ulp.c- Extension
.c- Size
- 1819 bytes
- Lines
- 85
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/irqchip.hlinux/mfd/syscon.hlinux/of_platform.hlinux/regmap.hasm/mach/arch.hcommon.hcpuidle.hhardware.h
Detected Declarations
function Copyrightfunction imx7ulp_init_machinefunction imx7ulp_init_late
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2017-2018 NXP
* Author: Dong Aisheng <aisheng.dong@nxp.com>
*/
#include <linux/irqchip.h>
#include <linux/mfd/syscon.h>
#include <linux/of_platform.h>
#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "cpuidle.h"
#include "hardware.h"
#define SIM_JTAG_ID_REG 0x8c
static void __init imx7ulp_set_revision(void)
{
struct regmap *sim;
u32 revision;
sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
if (IS_ERR(sim)) {
pr_warn("failed to find fsl,imx7ulp-sim regmap!\n");
return;
}
if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) {
pr_warn("failed to read sim regmap!\n");
return;
}
/*
* bit[31:28] of JTAG_ID register defines revision as below from B0:
* 0001 B0
* 0010 B1
* 0011 B2
*/
switch (revision >> 28) {
case 1:
imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
break;
case 2:
imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
break;
case 3:
imx_set_soc_revision(IMX_CHIP_REVISION_2_2);
break;
default:
imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
break;
}
}
static void __init imx7ulp_init_machine(void)
{
imx7ulp_pm_init();
mxc_set_cpu_type(MXC_CPU_IMX7ULP);
imx7ulp_set_revision();
of_platform_default_populate(NULL, NULL, NULL);
}
static const char *const imx7ulp_dt_compat[] __initconst = {
"fsl,imx7ulp",
NULL,
};
static void __init imx7ulp_init_late(void)
{
if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
imx7ulp_cpuidle_init();
}
DT_MACHINE_START(IMX7ulp, "Freescale i.MX7ULP (Device Tree)")
.init_machine = imx7ulp_init_machine,
.dt_compat = imx7ulp_dt_compat,
.init_late = imx7ulp_init_late,
MACHINE_END
Annotation
- Immediate include surface: `linux/irqchip.h`, `linux/mfd/syscon.h`, `linux/of_platform.h`, `linux/regmap.h`, `asm/mach/arch.h`, `common.h`, `cpuidle.h`, `hardware.h`.
- Detected declarations: `function Copyright`, `function imx7ulp_init_machine`, `function imx7ulp_init_late`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.