arch/arm/mach-npcm/platsmp.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-npcm/platsmp.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-npcm/platsmp.c- Extension
.c- Size
- 1791 bytes
- Lines
- 79
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/smp.hlinux/io.hlinux/of.hlinux/of_address.hasm/cacheflush.hasm/smp.hasm/smp_plat.hasm/smp_scu.h
Detected Declarations
function npcm7xx_smp_boot_secondaryfunction npcm7xx_smp_prepare_cpus
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018 Nuvoton Technology corporation.
// Copyright 2018 Google, Inc.
#define pr_fmt(fmt) "nuvoton,npcm7xx-smp: " fmt
#include <linux/delay.h>
#include <linux/smp.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <asm/cacheflush.h>
#include <asm/smp.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#define NPCM7XX_SCRPAD_REG 0x13c
extern void npcm7xx_secondary_startup(void);
static int npcm7xx_smp_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
struct device_node *gcr_np;
void __iomem *gcr_base;
int ret = 0;
gcr_np = of_find_compatible_node(NULL, NULL, "nuvoton,npcm750-gcr");
if (!gcr_np) {
pr_err("no gcr device node\n");
ret = -ENODEV;
goto out;
}
gcr_base = of_iomap(gcr_np, 0);
if (!gcr_base) {
pr_err("could not iomap gcr");
ret = -ENOMEM;
goto out;
}
/* give boot ROM kernel start address. */
iowrite32(__pa_symbol(npcm7xx_secondary_startup), gcr_base +
NPCM7XX_SCRPAD_REG);
/* make sure the previous write is seen by all observers. */
dsb_sev();
iounmap(gcr_base);
out:
return ret;
}
static void __init npcm7xx_smp_prepare_cpus(unsigned int max_cpus)
{
struct device_node *scu_np;
void __iomem *scu_base;
scu_np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
if (!scu_np) {
pr_err("no scu device node\n");
return;
}
scu_base = of_iomap(scu_np, 0);
if (!scu_base) {
pr_err("could not iomap scu");
return;
}
scu_enable(scu_base);
iounmap(scu_base);
}
static struct smp_operations npcm7xx_smp_ops __initdata = {
.smp_prepare_cpus = npcm7xx_smp_prepare_cpus,
.smp_boot_secondary = npcm7xx_smp_boot_secondary,
};
CPU_METHOD_OF_DECLARE(npcm7xx_smp, "nuvoton,npcm750-smp", &npcm7xx_smp_ops);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/smp.h`, `linux/io.h`, `linux/of.h`, `linux/of_address.h`, `asm/cacheflush.h`, `asm/smp.h`, `asm/smp_plat.h`.
- Detected declarations: `function npcm7xx_smp_boot_secondary`, `function npcm7xx_smp_prepare_cpus`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.